Polyteda

POLYTEDA develops not another DRC tool based on the outdated architecture but a unique processing technology based on fastest and most accurate flat engine on the market. Unique technology makes POLYTEDA`s flagship product PowerDRC/LVS the best solution for medium and large IC layouts for 40nm and above. The main idea of PowerDRC/LVS is to speed up the process of physical verification by using One-Shot™ processing that delivers maximum CPU efficiency per one rule check. Silicon-proven on 250nm, 180nm, 130nm, 90nm, 65nm, 40nm. PowerDRC benefits from parallel processing independent groups of rules as well as independent parts of layout (zone-based). Parallel tasks may be run in multi-CPU mode on: - a single host - multi host grids like Platform LSF or SGE - a cloud environment Scalability proven on 2, 4, 6, 8, 12, 16, 24, 32, 48, 64 CPUs PWRL, a key component of POLYTEDA` physical verification platform encapsulates advanced, complex rules into simpler syntax. While the PWRL syntax mirrors the well-known syntax used all these years in rule deck creation, it also efficiently encodes factors that are not considered at higher process nodes. For more information please visit our web site: www.polyteda.com Contact us today: info@polyteda.com