Upgrade Your Design and Verification with Jasper!
Jasper Design Automation's mission is to make full formal IC verification a competitive advantage for its customers. Jasper's formal verification solutions are used by logic designers, verification engineers and silicon bring-up teams to design, explore and debug RTL, to ensure correctness of block-level functionality and for rapid post-silicon validation and debug.
Industry
Software Development, Software, Computer Services, Web Design, Unknown
HQ Location
707 California Street
Mountain View, CA 94041, US
Keywords
formal verificatioICSoCesign. debugIP reuse